New approach to Design of Reversible BCD Adder
DOI:
https://doi.org/10.47392/irjash.2020.123Keywords:
Parallel adder/subtractor, Quantum cost, Reversible logic, Reversible BCD adderAbstract
Over the last few decades, research in reversible logic has increasingly become very popular and is gaining greater momentum in the present world. Reversible logic has started finding concrete applications in quantum computing, optical computing, nanotechnology-based systems, low-power CMOS design, and VLSI design. The principal objective of this work is to advocate for the quantum implementation of various reversible logic gates using C-NOT, Controlled-V, and Controlled-V† gates. The present work also presents a Binary Coded Decimal adder (BCD) in terms of the number of gates, garbage outputs, quantum cost, delay, and hardware complexity compared to existing designs.
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