Car Parking System Using FPGA

In today's days, motor vehicle use is increasing day by day, causing noise, traffic congestion, issues with parking spaces, and finding a vacant parking space is becoming increasingly difficult. In this paper we proposed a safe car parking management framework using Verilog HDL. This machine has two main modules Module-1: Password entry and exit. Module2: distance calculation and empty slot finding. Our execution time is very faster by using FPGA. This is about designing an efficient system which takes over the task of identifying free slots in a parking area that keeps parked vehicle records. Parking a vehicle also requires a password. With the rapid increase in the availability and use of cars in recent years, finding a vacant car park is a little complicated. It creates the issue of traffic congestion, emissions (noise and air), as the number of vehicles increases day by day. A FPGA based parking system has been proposed to conquer this problem.


Introduction
In this realistic world each person carried out many tasks without being evasive. Thus, in order to carry out all the activities for the effective use of resources, wise steps should be taken to curb waste of time in ineffective areas such as the most frequently performed practice, which is unfruitful vehicle parking. Therefore, this paper offers an option for an effective use of time in parking relevant to the security problem that serves at its best. The key topic includes the following solutions given below for the efficient use of time that does not take much time for parking purposes and also for providing a safe park without involving risks of any kind. The main goal is systematic parking with protection. Protection requires the use of password when parking, indication of number of available vacancies as well as their locations where only the adjacent vacancies are needed in particular, total number of vacancies available in a specific slot and even distance calculation to obstacles. Public services need a parking network International Research Journal on Advanced Science Hub (IRJASH) 89 which can effectively operate and be combined with other public utilities. There is no effective way to assign parking slots and parking management system fails to help and organize information for an efficient system. In order to avoid these problems, design is proposed for secured car parking management system, which will be implemented on FPGA to check vacancies and provide car protection. Recently, a reconfigurable FPGA architecture is an effective method for implementing a digital logic, as FPGA offers an arrangement between processors for general use and ASIC. The FPGA architecture is robust, programmable and can be re-functioned. It can easily change the FPGA based design by changing the software component. Our proposed system is designed for FPGA design and the modeling of gate levels.

Literature Survey
Several literature have been done related to the proposed work. In [1][2] proves the feasibility of the approach. This strategy is cost-effective and includes many of the aspects of smart car parking management. The project's central idea is to avoid troubles we face in the daily routine of parking our cars. Day by day the problem of parking cars proliferates. To this end a literature survey was performed in order to ensure that this would not be replicated as before. This is created using MATLAB, and it uses cameras to locate the free parking slots. Using this program photos collected by a surveillance camera were processed in real time to test the parking lot occupancies. The information is processed through a central control unit and is directed to the display panels located at strategic parking area locations. Through the details shown on the panels the drivers will know the empty parking lot.
In [3][4][5] it was proposed to introduce a safe car parking management framework using verilog HDL. This safe control system for car parks is split into two parts. Another is parking slot recognition and LCD display screens and another is safety warning that will provide the car with protection if the unauthorized individual decides to vacate the vehicle. The system uses four LCD screens, namely Total Vacancies, Adjacent Row Vacancies, and Nearest Vacancy screens. When showing vacancies, total number of empty parking spaces. Line Vacancies indicates the number of open empty slots in a given row. Next Vacancies reveals the number of vacancies in the parking lot next to it. Nearest Vacancy shows the number of nearest vacancies from the given list. That car will be given a password or key when the car is parked in a certain vacant location. A individual can enter a key only three times after the device doesn't work and the control or security person needs permission. This device will include safe vehicle parking. An approach using an intelligent car parking network based on WSN[6] (Wireless Sensor Network), in which wireless sensors are deployed into the parking area, with each parking lot consisting of one sensor node that tracks the parking lot occupancy.
In [7] the framework was implemented using programming language C. First the C code was checked on personal computer ( PC) to see how the filter and other blocks operate. LCD to display performance. This paper deals with the implementation of FPGA and ASIC designs to measure a moving remote object's distance and speed using laser source and echo pulses reflected from that remote object. With FPGA implementation, the project proceeded in three phases: All-in-C design using Xilinx Microblaze soft core processor system, accelerated design with custom co-processor and Microblaze soft core processor system, and complete custom hardware architecture implemented using Xilinx FPGA VHDL. The full framework was later introduced at ASIC. The design of ASIC optimized the Area and Timing modules for a process technology of 130 nm.

Existing System
Sensors such as IR (Infrared) are used in order to identify the enter and exit of the car at the parking slot. The password required for car entry and exit is done using FPGA. The number of slots available was identified by fixing cameras. The details of number of vehicles parked are not stored. The existing system provides information about the vacant slots. It doesn't give information about the exact location of vacancy parking slot in such a big area.

3.2Proposed System
To solve and sort out the problems in parking system, here is a solution. A sensor is at the entrance of the parking system which is activated to detect a vehicle coming. When a car enters in, a password is needed. If the password entered is correct the gate will open or else it will be locked. This is also the same for the exit process. And with the help of ultrasonic sensor the distance is measured in which the next car is available, the number of vacant slots and the number of cars parked already will be given in the form of a message.

Working Principle
The proposed smart car parking system into following three modules.
 Car entering and exiting module.  Distance measurement to find the obstacles.

Entering Module
In Entering Module it is sensed by the IR Sensors when the car enters the lot. The IR Sensors give the FPGA the pulse which considers an input to be detected. The vehicle is allowed into the parking lot only if the password is entered. If the entered password is correct then the vehicle is preceded to park or else the gate will remain closed.

Exiting Module
In Exiting Module it is detected by the IR Sensors as the vehicle moves out of the lot. The IR Sensors provide the pulse to the FPGA which assumes that an input is detected and that the car is only exited from the parking lot after the password has been entered correctly. And the gate is closed when the next car tries to exit the lot.

Distance measurement to find the obstacles
Distance and speed monitoring devices are used in many applications such as vehicles, protection etc. The system can calculate the time interval between two laser pulses, a machine-sent reference pulse and an echo pulse reflected back to the device. The machine determines the distance to the object on which the echo-pulse is reflected with the time information. The view of this project to the machine level is shown in Fig.1 An example of the reference and the echo signals.

Fig. 1 System Level View of Project
The Plan has two stages. In the first phase, target hardware is a Xilinx FPGA. In the second phase, target hardware is an integrated circuit (ASIC) application-specific solution where VHDL and standard cells are used. The design process of the FPGA framework is further broken down into three subphases. The first step is intended to only produce a software product, where the whole system is written in C language for the Xilinx MicroBlaze soft processor system as shown in Fig.2. The second is a mixed implementation of hardware and software, where one part of the device is implemented in C and the other part is implemented in hardware. The hardware is constructed using the terminology used to characterize VHDL. The third and final product on Xilinx XUP Virtex-II Pro Development System is to be completed in hardware and implemented. In VHDL a test vector generator emulating the "Source" and "Echo" laser signal pulses is designed and called "AD model." 256 samples should be included in each measurement.
Finally, as the device should be able to calculate velocity and to simulate motion. The second block that is the optical filter, a five tap filter for correlation.

Fig. 2 Block diagram
To calculate the interpolation, division must be made for both the reference and echo signals. A separate block that designs fast, non-restoring division handles the division. The division is not able to handle negative numbers, so it is appropriate to test the value sign and make a twocomplement, and then the division result to make the right calculation when calculating j.This is done twice, until both jecho and jref are calculated. The first as mentioned above is predetermined. As in the last calculation the speed of light and the sampling frequency are predefined, we have pre-calculated and implemented it as a constant within the block. The result is sent via SPI. In the above fig.3, the distance measurement is done by ultrasonic sensor. This helps us to find at which distance the next obstacle or a vehicle is located.

Fig. 4Simulation for car Entry and Exit
The above fig.4 is simulation output for car entry and exit password requirement. This program is dumped into FPGA kit if the password entered is correct the green LED glows. If the password entered are incorrect red LED glows.

Conclusion
The goal of this project was to develop a most effective smart car parking system. This was the key impetus in deciding to incorporate the FPGA method. With the support of Xilinx ISE Design Suite, smart car parking system is implemented using Verilog HDL. The design is tested on FPGA kit Spartan6. The FPGA increases productivity, reduces costs and speeds up market time.The system built can be used for many applications, and can easily increase the number of slot choices and increase parking protection. Through using the above implemented program parking becomes simple. The car is correctly identified and parking safety will be stressed. Even the drivers can easily pick the slot.

Future Scope
The arrival of autonomous vehicles (AVs) threatens to exploit the future of the smart parking program. Urban cities around the world have already started experimenting with self-parking cars, advanced AV parking lots. But it is easy to use this device that is not only unique to a private car park like malls, business parking etc., But multiple sites, such as public parking, can also be built and the functionality can be added by giving parking information. By purging the need for human labor, this will make parking space management more efficient.